Generally, a pixel portion of a solid-state imaging apparatus has a photodiode which generates a certain amount of electrical charges based on an amount of light irradiation. The photodiode (hereinafter referred to as a PD) includes an “n” impurity layer formed on the surface of, for example, a “p” silicon substrate. A “p” impurity layer is formed on the surface of the “n” impurity layer, to eliminate the crystal defects of this surface.
In the pixel portion, a gate electrode is formed in a position adjacent to the PD on the silicon substrate. Further, a floating diffusion (FD) including an “n+” impurity layer is formed in a position adjacent to the gate electrode, on the surface of the silicon substrate.
In this pixel portion of the solid-state imaging apparatus, a voltage is applied to the gate electrode, and the potential right under the gate electrode becomes deep, thereby transporting the electric charges generated in the PD to the FD.
In a conventionally-known solid-state imaging apparatus, to improve the transport efficiency when transporting the electric charges generated in the PD to the FD, an “n” impurity layer included in the PD is formed deep in a stair-like manner toward a transport direction of the electric charges. This “n” impurity layer is formed through a plurality of times of ion implantation. According to the solid-state imaging apparatus, in the PD, the potential is formed deep in a stair-like manner toward the transport direction of the electric charges, thus improving the transport efficiency of the electric charges.